CoolRunner-II器件的设置输入/输出标准
发布时间:2008/9/17 0:00:00 访问次数:708
coolrunner-ii系列xc2c128以上的器件支持多种接口标准,器件的默认参数为lvttl。如果需要改变,必须通过属性来控制,也可以通过ise 10设计工具的全局约束界面来设置。该功能的属性设置如下。
(1)约束文件(ucf)
net <signal name> <i/o standard attribute name>;
例如:
net data_in lostandard=lvcoms18;
net clock iostandard=lvcoms18;
(2)vhdl语言
attribute iostandard: string、
attribute lostandard of <signal name>: signal is "<i/o standardattribute name>"
例如:
attribute iostandard: string;
attribute lostandard of data_in: signal is "lvcmo518";
attribute iostandard of clock: signal is "lvcoms18"
(3)verilog语言
//synthesis attribute iostandard of <signal name> is <i/o standard
attribute name>;
例如:
//synthesis attribute iostandard of data_in is "lvcmos18" ;
//synthesis attribute lostandard of clock is "lvcmos18";
欢迎转载,信息来自维库电子市场网(www.dzsc.com)
coolrunner-ii系列xc2c128以上的器件支持多种接口标准,器件的默认参数为lvttl。如果需要改变,必须通过属性来控制,也可以通过ise 10设计工具的全局约束界面来设置。该功能的属性设置如下。
(1)约束文件(ucf)
net <signal name> <i/o standard attribute name>;
例如:
net data_in lostandard=lvcoms18;
net clock iostandard=lvcoms18;
(2)vhdl语言
attribute iostandard: string、
attribute lostandard of <signal name>: signal is "<i/o standardattribute name>"
例如:
attribute iostandard: string;
attribute lostandard of data_in: signal is "lvcmo518";
attribute iostandard of clock: signal is "lvcoms18"
(3)verilog语言
//synthesis attribute iostandard of <signal name> is <i/o standard
attribute name>;
例如:
//synthesis attribute iostandard of data_in is "lvcmos18" ;
//synthesis attribute lostandard of clock is "lvcmos18";
欢迎转载,信息来自维库电子市场网(www.dzsc.com)