the example in this section defines a black box for an altera lpm_ram_dq,
which is then instantiated at a higher level. the lpm_ram_dq is a parameterized
ram with separate input and output ports. altera recommends
using the lpm_ram_dq to implement asynchronous memory or memory
with synchronous inputs and/or outputs. the lpm_ram_dq function uses
eabs in flex10k devices, and latch arrays in other device families. if you
are using a flex10k device, altera recommends that you use synchronous
rather than asynchronous ram functions.
1. define a black box with the name myram_64x16. notice that
immediately after the port list, but before the semicolon ';' is the
syn_black_box synthesis directive with the lpm_type specified as
lpm_ram_dq, along with other specified arguments.
module myram_64x16 (data, address, inclock, outclock, we, q)
/* synthesis syn_black_box
lpm_width=16
lpm_widthad=6
lpm_type="lpm_ram_dq" */ ;
input [15:0] data;w
input [5:0] address;
input inclock, outclock;
input we;
output [15:0] q;
// this is an empty module
endmodule
2. now instantiate the lpm in a higher-level module.
module myram(clock, we, data, address, q);
input clock, we;
input [15:0] data;
input [5:0] address;
output [15:0] q;
myram_64x16 inst1 (data, address, clock, clock, we, q);
endmodule